EE220 2024 Noise Analysis and Simulation

• Instructions: This activity is structured as a tutorial with an activity at the end. Should you have any questions, clarifications, or issues, please contact your instructor as soon as possible.
• At the end of this activity, the student should be able to:

1. Perform noise simulations using Cadence Spectre using the GlobalFoundries 22nm FDSOI design kit.

Activity 1: NMOS Noise

Bias a 0.8V SLVT NMOS transistor with $V_{GS}=0.4\mathrm {V}$ and $V_{DS}=0.4\mathrm {V}$. For a width of $1\mathrm {\mu m}$ and a length of $L_{\min }$:

• What is the resulting DC drain current?
• What is the transistor's $g_{m}$ and $V^{*}={\frac {2I_{D}}{g_{m}}}$?

Run a noise analysis from $1\mathrm {Hz}$ to $1\mathrm {THz}$.

• Plot the drain current noise power spectral density, ${\frac {\overline {i_{dn}^{2}\left(f\right)}}{\Delta f}}$.
  • Identify the regions where thermal noise and flicker noise dominates.
  • What is the flicker noise corner?
  • Estimate the value of $\gamma$.
  • Estimate the value of ${\frac {K_{f}}{C_{ox}}}$
• What is the total integrated drain current noise power?

Recall that the MOSFET drain current noise can be modeled as:

${\overline {i_{dn}^{2}}}={\frac {K_{f}I_{D}}{C_{ox}L^{2}}}{\frac {\Delta f}{f}}+4kT\gamma g_{m}\Delta f$

Change the length of the transistor to $2L_{\min }$ and $3L_{\min }$. Identify and explain any changes in the drain current noise power spectral density.

• Repeat for the LVT and regular-VT NMOS transistors. Did you notice any differences in noise behavior?

Activity 2: PMOS Noise

Repeat Activity 1 but with 0.8V PMOS transistors with the same sizes, and with $V_{GS}=-0.4\mathrm {V}$ and $V_{DS}=-0.4\mathrm {V}$.

Activity 3: Cascode Amplifier Noise Analysis

Consider the cascoded NMOS amplifier (biased with an ideal current source) shown in Fig. 1. Ignoring all other capacitances except $C_{L}$, and given the small-signal parameters $g_{m1}$, $g_{m2}$, $r_{o1}$ and $r_{o2}$:

Figure 1: A cascode amplifier.

1. Calculate the small-signal gain of the cascode amplifier, $A_{v}\!\left(s\right)={\frac {v_{out}}{v_{in}}}$. Assume $g_{m1}r_{o1}\gg 1$ and $g_{m2}r_{o2}\gg 1$.
2. Calculate the noise spectral density, ${\overline {v_{out}^{2}\left(f\right)}}$, and the total integrated output noise, ${\overline {v_{out,T}^{2}}}$. Assuming that $r_{o1}\rightarrow \infty$ and $r_{o2}\rightarrow \infty$, and that the flicker noise is zero.
3. Repeat (2) but with finite $r_{o1}$ and $r_{o2}$. How does this affect the output noise?

Activity 4: Input-Referred Noise

Given the gate-source capacitance, $C_{GS}$, of transistor $M_{1}$ of the cascode amplifier in Fig. 1, calculate:

• The input equivalent voltage noise generator, ${\overline {v_{i,eq}^{2}\left(f\right)}}$.
• The input equivalent current noise generator, ${\overline {i_{i,eq}^{2}\left(f\right)}}$.

Note that when calculating the output noise, you can assume that $r_{o1}\rightarrow \infty$ and $r_{o2}\rightarrow \infty$, but when calculating the gains, assume finite $r_{o1}$ and $r_{o2}$.

Report Guide

Write up a report (maximum of 5 pages including figures) answering the questions above. Include annotated graphs if needed.