Activity: IC Fabrication and Scaling: Difference between revisions
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== Video == | == Video == | ||
# Video: '''Silicon Run I (1996)''' [https://www.youtube.com/watch?v=3XTWXRj24GM Youtube link] | # Video: '''Silicon Run I (1996)''' [https://www.youtube.com/watch?v=3XTWXRj24GM Youtube link] | ||
# Video '''Chip Manufacturing - How are Microchips made?''' | # Video '''Chip Manufacturing - How are Microchips made?''' - Infineon (2019) [https://www.youtube.com/watch?v=bor0qLifjz4 Youtube link] | ||
After watching the video, go over Phillip Allen's [https://aicdesign.org/wp-content/uploads/2018/08/lecture03-151116.pdf slides] on CMOS fabrication. This is a good simplified overview of the modern IC fabrication process. | After watching the video, go over Phillip Allen's [https://aicdesign.org/wp-content/uploads/2018/08/lecture03-151116.pdf slides] on CMOS fabrication. This is a good simplified overview of the modern IC fabrication process. |
Latest revision as of 20:04, 4 September 2022
- Instructions: In this activity, you are tasked to
- Watch 2 short videos about integrated circuit (IC) fabrication.
- Read a couple of papers on CMOS scaling, and an article on the history of analog design.
- For graduate students: Write a short (1-page) report.
- Should you have any questions, clarifications, or issues, please contact your instructor as soon as possible.
- At the end of this activity, the student should be able to:
- Enumerate and explain the key steps and technologies involved in fabricating integrated circuits.
- Explain why there is a concern about the future of CMOS technology.
Video
- Video: Silicon Run I (1996) Youtube link
- Video Chip Manufacturing - How are Microchips made? - Infineon (2019) Youtube link
After watching the video, go over Phillip Allen's slides on CMOS fabrication. This is a good simplified overview of the modern IC fabrication process.
Paper/Article Reading
- T. Skotnicki, J. A. Hutchby, Tsu-Jae King, H. -. P. Wong and F. Boeuf, The end of CMOS scaling: toward the introduction of new materials and structural changes to improve MOSFET performance, in IEEE Circuits and Devices Magazine, vol. 21, no. 1, pp. 16-26, Jan.-Feb. 2005, doi: 10.1109/MCD.2005.1388765.
- UP students can access this paper for free via the UPEEEI VPN service and IEEExplore. If you cannot access the IEEE link via the UPEEEI VPN, you can also access this via this link.
- M. T. Bohr and I. A. Young, CMOS Scaling Trends and Beyond, in IEEE Micro, vol. 37, no. 6, pp. 20-29, November/December 2017, doi: 10.1109/MM.2017.4241347.
- UP students can access this paper for free via the UPEEEI VPN service and IEEExplore. Let your instructors know if you cannot access this paper.
- S. Taranovich, Analog: back to the future, EDN Online, June 2012, (part 1,part 2, part 3)
VPN Access
For questions on UPEEEI VPN access, UP students can send an email to EEEI Support: @
Report Guide for Graduate Students
Based on the video you watched, the papers (not limited to the two papers above) you have read, and any other resource that is available to you, write a short (1-2 page) report on what you think would be the critical medium- and/or long-term challenges IC designers will face in your area of research, and why.
Submission
The submission links will be posted on Piazza.