Activity: MOS Transistor Characteristics

Activity: MOSFET Characteristic Curves

• Instructions: This activity is structured as a tutorial with an activity at the end. Should you have any questions, clarifications, or issues, please contact your instructor as soon as possible.
• At the end of this activity, the student should be able to:

1. Generate the characteristic curves of NMOS and PMOS transistors.

MOS Transfer Characteristics

Figure 1: A circuit to obtain the V-I characteristics of an NMOS transistor.

The transfer characteristics of an NMOS transistor is the relationship between the gate-source voltage, which serves as the "input" port of a common-source amplifier, and the "output" drain current. To get you started, here is an xschem schematic to simulate the transfer characteristic of our sky130 low-threshold voltage (LVT) NMOS transistor. The NMOS transistor in the sample schematic has the following parameters: a width $W=10\mathrm {\mu m}$, a length $L=0.15\mathrm {\mu m}$, and the number of fingers $nf=1$.

Activity 1: MOS Operating Regions

By modifying the sample schematic, plot out the NMOS transfer characteristics for the TT, FF, and SS corners, as shown in Figs. 2 and 3. Graphically, identify the following regions:

• The quadratic or square-law region
• The velocity saturation region
• The subthreshold or weak inversion region
• The moderate inversion region.

Figure 2: The NMOS transfer characteristics.

Figure 3: The NMOS transfer characteristics on a log scale.

These figures were generated from the simulation output using this Python script. Please feel free to edit and adopt to your needs.

Comment on the effect of process variations and changing $V_{DS}$ on the transfer characteristics, specifically the value of the drain current, and the operating regions, when you:

• Change $V_{DS}$ to 0.45V and 1.35V
• Change $nf$ from 1 to 10

Do the simulation results agree with what you expect? Why?

Activity 2: NMOS Output Characteristics

The given SPICE file and Python script also plots the NMOS output characteristics, shown in Fig. 4. Modify the sample schematic and plot the NMOS TT, FF, and SS corner output characteristics and graphically, identify the saturation region, the subthreshold region, and the linear or resistive region. Comment on the effect of process variations.

Figure 5: The NMOS output characteristics showing the TT, FF, and SS corners.

Activity 3: Increasing Channel Length

What happens when you increase the transistor length to $L=0.30\mathrm {\mu m}$ and $L=0.45\mathrm {\mu m}$? Plot out the resulting transfer and output characteristics, and comment on the resulting drain currents, the operating regions, and the effect of process variations.

Activity 4: PMOS Transfer and Output Characteristics

Create a schematic to generate the transfer and output characteristics of a 1.8V LVT PMOS transistor with width $W=10\mathrm {\mu m}$, length $L=0.35\mathrm {\mu m}$, and number of fingers $nf=1$. Then repeat activities 1, 2, and 3 (with $L=0.70\mathrm {\mu m}$ and $L=1.05\mathrm {\mu m}$).

Report Guide

Write up a report (maximum of 5 pages including figures) answering the questions above. Include annotated graphs showing the different regions of operation for both the NMOS and PMOS transistors.

Submission

This activity is for both graduate and undergraduate students. For UP students, the submission bin link will be posted in Piazza.