Activity: Noise Analysis: Difference between revisions

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(Created page with "* '''Instructions''': This activity is structured as a tutorial with an activity at the end. Should you have any questions, clarifications, or issues, please contact your instructor as soon as possible. * At the end of this activity, the student should be able to: # Perform noise simulations using NGSPICE. == Activity 1: Resistor Noise == == Activity 2: MOSFET Noise == == Activity 3: Noise Analysis == == Activity 4: Input-Referred Noise == == Report Guide == Write...")
 
 
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# Perform noise simulations using NGSPICE.
# Perform noise simulations using NGSPICE.


== Activity 1: Resistor Noise ==
== Activity 1: NMOS Noise ==
Bias a 1.8V LVT NMOS transistor with <math>V_{GS}=0.9\mathrm{V}</math> and <math>V_{DS}=0.9\mathrm{V}</math>. For a width of <math>10\mathrm{\mu m}</math> and a length of <math>0.35\mathrm{\mu m}</math>:
* What is the resulting DC drain current?
* What is the transistor's <math>g_m</math> and <math>V^*</math>?


== Activity 2: MOSFET Noise ==
Run a noise analysis from <math>1\mathrm{Hz}</math> to <math>100\mathrm{GHz}</math>. You can use this [https://github.com/louisalarcon/ee220/blob/80eb5f2084bd46437356fd80fad6b938a836d71c/cidr/mos-noise-corners.sch sample schematic] as a starting point.
* Plot the drain current noise power spectral density.
** Identify the regions where thermal noise and flicker noise dominates.
** What is the flicker noise corner?
** Estimate the value of <math>\gamma</math>.
** Estimate the value of <math>\frac{K_f}{C_{ox}}</math>
* What is the total integrated drain current noise power? 


== Activity 3: Noise Analysis ==
Recall that the MOSFET drain current noise can be modeled as:
 
::<math>\overline{i_{dn}^2} = \frac{K_f I_D}{C_{ox} L^2}\frac{\Delta f}{f} + 4kT\gamma g_m \Delta f</math>
 
Change the length of the transistor to <math>0.45\mathrm{\mu m}</math>. Identify and explain any changes in the drain current noise power spectral density.
 
== Activity 2: PMOS Noise ==
Repeat Activity 1 but with a 1.8V LVT PMOS transistor with the same size and with <math>V_{GS}=-0.9\mathrm{V}</math> and <math>V_{DS}=-0.9\mathrm{V}</math>.
 
== Activity 3: Cascode Amplifier Noise Analysis ==
Consider the cascoded NMOS amplifier (biased with an ideal current source) shown in Fig. 1. Ignoring all other capacitances except <math>C_L</math>, and given the small-signal parameters <math>g_{m1}</math>, <math>g_{m2}</math>, <math>r_{o1}</math> and <math>r_{o2}</math>:
 
{|
| [[File:Cascode-noise.png|thumb|225px|Figure 1: A cascode amplifier.]]
|-
|}
 
# Calculate the small-signal gain of the cascode amplifier, <math>A_v\!\left(s\right) = \frac{v_{out}}{v_{in}}</math>. Assume <math>g_{m1}r_{o1}\gg 1</math> and <math>g_{m2}r_{o2}\gg 1</math>.
# Calculate the noise spectral density, <math>\overline{v^2_{out}\left(f\right)}</math>, and the total integrated output noise, <math>\overline{v^2_{out,T}}</math>. Assuming that <math>r_{o1}\rightarrow \infty</math> and <math>r_{o2}\rightarrow \infty</math>, and that the flicker noise is zero.
# Repeat (2) but with finite <math>r_{o1}</math> and <math>r_{o2}</math>. How does this affect the output noise?


== Activity 4: Input-Referred Noise ==
== Activity 4: Input-Referred Noise ==
Given the gate-source capacitance, <math>C_{GS}</math>, of transistor <math>M_1</math> of the cascode amplifier in Fig. 1, calculate:
* The input equivalent voltage noise generator, <math>\overline{v^2_{i,eq}\left(f\right)}</math>.
* The input equivalent current noise generator, <math>\overline{i^2_{i,eq}\left(f\right)}</math>.
Note that when calculating the output noise, you can assume that <math>r_{o1}\rightarrow\infty</math> and <math>r_{o2}\rightarrow\infty</math>, but when calculating the gains, assume finite <math>r_{o1}</math> and <math>r_{o2}</math>.


== Report Guide ==
== Report Guide ==

Latest revision as of 10:33, 6 November 2022

  • Instructions: This activity is structured as a tutorial with an activity at the end. Should you have any questions, clarifications, or issues, please contact your instructor as soon as possible.
  • At the end of this activity, the student should be able to:
  1. Perform noise simulations using NGSPICE.

Activity 1: NMOS Noise

Bias a 1.8V LVT NMOS transistor with and . For a width of and a length of :

  • What is the resulting DC drain current?
  • What is the transistor's and ?

Run a noise analysis from to . You can use this sample schematic as a starting point.

  • Plot the drain current noise power spectral density.
    • Identify the regions where thermal noise and flicker noise dominates.
    • What is the flicker noise corner?
    • Estimate the value of .
    • Estimate the value of
  • What is the total integrated drain current noise power?

Recall that the MOSFET drain current noise can be modeled as:

Change the length of the transistor to . Identify and explain any changes in the drain current noise power spectral density.

Activity 2: PMOS Noise

Repeat Activity 1 but with a 1.8V LVT PMOS transistor with the same size and with and .

Activity 3: Cascode Amplifier Noise Analysis

Consider the cascoded NMOS amplifier (biased with an ideal current source) shown in Fig. 1. Ignoring all other capacitances except , and given the small-signal parameters , , and :

Figure 1: A cascode amplifier.
  1. Calculate the small-signal gain of the cascode amplifier, . Assume and .
  2. Calculate the noise spectral density, , and the total integrated output noise, . Assuming that and , and that the flicker noise is zero.
  3. Repeat (2) but with finite and . How does this affect the output noise?

Activity 4: Input-Referred Noise

Given the gate-source capacitance, , of transistor of the cascode amplifier in Fig. 1, calculate:

  • The input equivalent voltage noise generator, .
  • The input equivalent current noise generator, .

Note that when calculating the output noise, you can assume that and , but when calculating the gains, assume finite and .

Report Guide

Write up a report (maximum of 5 pages including figures) answering the questions above. Include annotated graphs if needed.

Submission

This activity is for both graduate and undergraduate students. For UP students, the submission bin link will be posted in Piazza.