Activity: Noise Analysis

• Instructions: This activity is structured as a tutorial with an activity at the end. Should you have any questions, clarifications, or issues, please contact your instructor as soon as possible.
• At the end of this activity, the student should be able to:

1. Perform noise simulations using NGSPICE.

Activity 1: NMOSFET Noise

Bias a 1.8V LVT NMOS transistor with $V_{GS}=0.9\mathrm {V}$ and $V_{DS}=0.9\mathrm {V}$. For a width of $10\mathrm {\mu m}$ and a length of $0.35\mathrm {\mu m}$:

• What is the resulting DC drain current?
• What is the transistor's $g_{m}$ and $V^{*}$?

Run a noise analysis from $1\mathrm {Hz}$ to $100\mathrm {GHz}$. You can use this sample schematic as a starting point.

• Plot the drain current noise power spectral density.
  • Identify the regions where thermal noise and flicker noise dominates.
  • What is the flicker noise corner?
  • Estimate the value of $\gamma$.
  • Estimate the value of ${\frac {K_{f}}{C_{ox}}}$
• What is the total integrated drain current noise power?

Recall that the MOSFET drain current noise can be modeled as:

${\overline {i_{dn}^{2}}}={\frac {K_{f}I_{D}}{C_{ox}L^{2}}}{\frac {\Delta f}{f}}+4kT\gamma g_{m}\Delta f$

Change the length of the transistor to $0.45\mathrm {\mu m}$. Identify and explain any changes in the drain current noise power spectral density.

Activity 2: PMOSFET Noise

Repeat Activity 1 but with a 1.8V LVT PMOS transistor with the same size and with $V_{GS}=-0.9\mathrm {V}$ and $V_{DS}=-0.9\mathrm {V}$.

Report Guide

Write up a report (maximum of 5 pages including figures) answering the questions above. Include annotated graphs if needed.

Submission

This activity is for both graduate and undergraduate students. For UP students, the submission bin link will be posted in Piazza.