EE229 2025 Activity 01: Difference between revisions

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EE229 Activity 1: '''Passive Matching Networks'''
EE229 Activity 1: '''Passive Matching Networks'''
* '''Instructions''': This activity  has two design problems, and you are expected to create a Google Colab file that contains your analysis and calculations, schematic, SPICE netlist, and simulation results. Please refer to this sample Google Colab template. Should you have any questions, clarifications, or issues, please contact your instructor as soon as possible.  
* '''Instructions''': This activity  has two design problems, and you are expected to create a Google Colab file that contains your analysis and calculations, schematic, SPICE netlist, and simulation results. Please refer to this sample [https://colab.research.google.com/drive/1KXeH-y5QtoO2dLmczqPP0tOLRWgiOOGh?usp=sharing Google Colab template]. Should you have any questions, clarifications, or issues, please contact your instructor as soon as possible.  
** If you are new to ngspice, please refer to the ngspice [http://ngspice.sourceforge.net/docs.html user manual].
** If you are new to ngspice, please refer to the ngspice [http://ngspice.sourceforge.net/docs.html user manual].
* At the end of this activity, the student should be able to:
* At the end of this activity, the student should be able to:
# Design and verify the performance of passive impedance matching circuits using ngspice.
# Design and verify the performance of passive impedance matching circuits using ngspice.
== Design Problem 1: ==
You are asked to design a high-pass <math>\pi</math>-network to match a <math>2.4\,\mathrm{GHz}</math> voltage source with source resistance <math>50\,\mathrm{\Omega}</math> to a <math>300\,\mathrm{\Omega}</math> load, with a required <math>Q</math> of <math>50</math>.
* Determine the inductor and capacitor values.
* Verify the functionality of your impedance matching circuit via SPICE simulations.
* Answer the following questions:
** How sensitive is your circuit to variations in the inductor and capacitor values? I.e. what happens when your inductor and capacitor values vary by <math>\pm 10%</math>?
** Calculate the insertion loss of your matching network when:
*** You use a discrete inductors with <math>Q=200</math>.
*** You use an on-chip inductors with <math>Q=20</math>.
== Design Problem 2: ==
You are once again asked to design a high-pass matching network to match an <math>8\,\mathrm{GHz}</math> ultra-wideband (UWB) voltage source with source resistance <math>50\,\mathrm{\Omega}</math> to a <math>75\,\mathrm{\Omega}</math> load, but in this case, you want to reduce the value of <math>Q</math> to the lowest possible value using a cascade of 3 L-sections.
* Determine the inductor and capacitor values.
* Verify the functionality of your impedance matching circuit via SPICE simulations.
* Answer the following questions:
** What is the <math>Q</math> of your matching network?
** How sensitive is your circuit to variations in the inductor and capacitor values? I.e. what happens when your inductor and capacitor values vary by <math>\pm 10%</math>?
** Calculate the insertion loss of your matching network when:
*** You use a discrete inductors with <math>Q=200</math>.
*** You use an on-chip inductors with <math>Q=20</math>.

Revision as of 16:25, 13 February 2025

EE229 Activity 1: Passive Matching Networks

  • Instructions: This activity has two design problems, and you are expected to create a Google Colab file that contains your analysis and calculations, schematic, SPICE netlist, and simulation results. Please refer to this sample Google Colab template. Should you have any questions, clarifications, or issues, please contact your instructor as soon as possible.
    • If you are new to ngspice, please refer to the ngspice user manual.
  • At the end of this activity, the student should be able to:
  1. Design and verify the performance of passive impedance matching circuits using ngspice.

Design Problem 1:

You are asked to design a high-pass -network to match a voltage source with source resistance to a load, with a required of .

  • Determine the inductor and capacitor values.
  • Verify the functionality of your impedance matching circuit via SPICE simulations.
  • Answer the following questions:
    • How sensitive is your circuit to variations in the inductor and capacitor values? I.e. what happens when your inductor and capacitor values vary by ?
    • Calculate the insertion loss of your matching network when:
      • You use a discrete inductors with .
      • You use an on-chip inductors with .

Design Problem 2:

You are once again asked to design a high-pass matching network to match an ultra-wideband (UWB) voltage source with source resistance to a load, but in this case, you want to reduce the value of to the lowest possible value using a cascade of 3 L-sections.

  • Determine the inductor and capacitor values.
  • Verify the functionality of your impedance matching circuit via SPICE simulations.
  • Answer the following questions:
    • What is the of your matching network?
    • How sensitive is your circuit to variations in the inductor and capacitor values? I.e. what happens when your inductor and capacitor values vary by ?
    • Calculate the insertion loss of your matching network when:
      • You use a discrete inductors with .
      • You use an on-chip inductors with .