Design: A Simple Common-Source Amplifier

Instructions: This activity is structured as a tutorial with an activity at the end. Should you have any questions, clarifications, or issues, please contact your instructor as soon as possible.
At the end of this activity, the student should be able to:

Design a simple common-source amplifier.

Activity 1: Transistor Intrinsic Gain

We can determine the intrinsic NMOS small-signal gain, $a_{0}=g_{m}\cdot r_{o}$ , for a desired DC operating point, i.e for a given drain current, $I_{DC}$ , and drain-to-source voltage, $V_{DS}$ . This implies a certain gate-to-source voltage, $V_{GS}$ . For square-law devices, we can easily calculate the required $V_{GS}$ that corresponds to $I_{DC}$ and $V_{DS}$ . However, for deep submicron devices that do not follow the square law, we can either run simulations to determine this $V_{GS}$ , or instead, we can let SPICE calculate $V_{GS}$ for us. As seen in Fig. 1, we can use negative feedback to obtain the appropriate $V_{GS}$ .

Figure 1: The NMOS intrinsic gain simulation setup.

Figure 2: The NMOS intrinsic gain.

Tasks: (Use $W=40\mathrm {\mu m}$ , $L=0.15\mathrm {\mu m}$ , and $I_{D}=1\mathrm {mA}$ )

Using NGSPICE, sweep $V_{DS}$ from 200mV to 1.8V, and plot $V_{GS}$ as a function of $V_{DS}$ .
From the $V_{GS}$ vs. $V_{DS}$ plot, derive the NMOS instrinsic gain, $a_{0}=\left({\frac {\partial V_{GS}}{\partial V_{DS}}}\right)^{-1}$ , as a function of $V_{DS}$ .
Repeat for transistor lengths of $0.20\mathrm {\mu m}$ , $0.25\mathrm {\mu m}$ , $0.30\mathrm {\mu m}$ , $0.35\mathrm {\mu m}$ , and $0.40\mathrm {\mu m}$ , and generate the graphs in Fig. 2.