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- 08:30, 24 April 2024 Project Discussion (hist | edit) [813 bytes] Anastacia Alvarez (talk | contribs) (Created page with "For your EE 227 project, each group/individual will be implementing a different design. Undergraduates are allowed to implement the project in groups of 2 or 3. Individual projects are also allowed. For graduate students, projects will be individual. Some possible projects (for undergrads): * 8- or 16- bit processor * image filtering * other encryption/decryption algorithms")
- 13:04, 22 April 2024 Lab 4: Sequential Design (hist | edit) [1,994 bytes] Anastacia Alvarez (talk | contribs) (Created page with "In this exercise, we will complete our design of the LiCi encryption. Below are the general steps we will be following: * Using the keygen design from Lab 2, we will re-synthesize it using the sky130nm following the procedure in Lab 3. * Design the whole system, using our keygen, LiCi round and counter. * Synthesize the design with and without constraints")
- 14:07, 19 March 2024 DFG Exercise (hist | edit) [345 bytes] Anastacia Alvarez (talk | contribs) (Created page with "Given the following code snippet: d = a*c t = a+b s = d*t If t = 1 then { d = a-b s = a+b } Else d = a+d 1. Determine the single assignment form of the code 2. Draw the corresponding data flow graph 4. Determine the datapath assuming you have 1 multiplier, 1 adder and 1 subtractor 5. Derive the corresponding control")
- 18:16, 14 March 2024 Lab 3a: Synthesis and P&R (hist | edit) [692 bytes] Anastacia Alvarez (talk | contribs) (Created page with "In this exercise, we will go through the synthesis and place and route process with the SkyWater 130nm process. Use the tutorial from SEACAS 2023.")
- 14:32, 26 February 2024 Hardware Description Languages (hist | edit) [1,785 bytes] Anastacia Alvarez (talk | contribs) (Created page with "As the size and complexity of digital systems increase, more computer aided design tools which facilitate design entry, verification and automatic hardware generation are being introduced into the design process. The newest addition to this design methodology is Hardware Description Languages (HDLs). Hardware Description Language is a specialized language used to describe the behaviour and/or structure of digital circuits. HDLs are used to describe hardware for the pur...")
- 07:40, 13 February 2024 Modern VLSI Design (February 2024) (hist | edit) [5,705 bytes] Anastacia Alvarez (talk | contribs) (Created page with "* '''Modern VLSI Design''' * Second Semester AY 2023-2024 ** Synchronous classes will be held Tuesdays 6:30-8:30 PM from 20 Feb 2024 - 21 May 2024 ** Refer to the [https://our.upd.edu.ph/files/calendar/regular/ACAD%20CAL%202023-2024.pdf UP Diliman Academic Calendar] for relevant dates and holidays. * Course Credit: 3 units (2 units lecture, 1 unit lab) == Catalog Description == Digital systems and VLSI. Transistors and layout. Logic functions. Combinational logic netwo...")