Digital Systems Testing (January 2025): Difference between revisions
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| style="width: 20%" | [https://drive.google.com/file/d/1I7K7oJL34muwrcj1m3b4yMM0rPUcG8qq/view?usp=sharing Zoom Meeting Summary] | | style="width: 20%" | [https://drive.google.com/file/d/1I7K7oJL34muwrcj1m3b4yMM0rPUcG8qq/view?usp=sharing Zoom Meeting Summary] | ||
[https://drive.google.com/file/d/1I5FxoIGbwe4GUrxoHIaopzTZYbfDco6M/view?usp=sharing Lec00 Slide deck] | [https://drive.google.com/file/d/1I5FxoIGbwe4GUrxoHIaopzTZYbfDco6M/view?usp=sharing Lec00 Slide deck] | ||
[https://drive.google.com/file/d/1Gpn3s9xoJXdw76-6BVaL4w_z9eT0r-N8/view?usp=sharing Meeting Recording] | |||
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Revision as of 13:31, 27 January 2025
- Digital Systems Testing
- Second Semester AY 2024-2025
- Synchronous classes will be held Thursdays 6-9 PM
- Refer to the UP Diliman Academic Calendar for relevant dates and holidays.
- Course Credit: 3 units (3 hours lecture)
Catalog Description
Test economics and motivation. Fault models and simulation. Test pattern generation. Measures for testability. Design for testability. Memory testing.
Prerequisite: Digital Logic Design and Introduction to Semiconductor Devices
Course Outline
| Module | Date | Topic | Resources | Activity |
|---|---|---|---|---|
| 0 | Jan 23 | Introduction | Zoom Meeting Summary | |
| 1 | Jan 30 | |||
Announcements
- Jan 23: This will be our class home page. For those enrolled in EE 269, assessment submissions will be through UVLe
References
- Book References
- M. L. Bushnell and V. D. Agrawal, Essentials of Electronic Testing, Springer, 2005.
- Miron Abramovici, Melvin A. Breuer and Arthur D. Friedman, “Digital Systems Testing & Testable Design”, IEEE Press, 1994
- Niraj Jha and Sandeep Gupta, “Testing of Digital Systems”, Cambridge University Press, 2003
- Z. Navabi, “Digital System Test and Testable Design”. Springer, 2011.
- Other References
- Lukac, M., Kameyama, M., Perkowski, M., & Kerntopf, P. (2019). USING HOMING, SYNCHRONIZING AND DISTINGUISHING INPUT SEQUENCES FOR THE ANALYSIS OF REVERSIBLE FINITE STATE MACHINES. Facta Universitatis, Series: Electronics and Energetics, 32(3), 417-438
- I. Pomeranz and S. Reddy, “Application of homing sequences to synchronous sequential circuit testing,” in Test Symposium, 1993., Proceedings of the Second Asian, pp. 324–329