Modern VLSI Design (February 2024): Difference between revisions

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* review of semiconductor fundamentals [[https://www.up-microlab.org/resources/classes/eee-41-home-page/eee-41-s1y2017/ EEE 41]]
* review of semiconductor fundamentals [[https://www.up-microlab.org/resources/classes/eee-41-home-page/eee-41-s1y2017/ EEE 41]]


* review of transistors and transistor circuits [[https://www.up-microlab.org/resources/classes/eee-51-home-page/eee-51-s2y2019/ EEE 51]]
* Book References
 
* Boom References
** S. Brown and Z. Vranesic, Fundamentals of Digital Logic with Verilog Design, 3rd ed., McGraw Hill: New York, 2014
** S. Brown and Z. Vranesic, Fundamentals of Digital Logic with Verilog Design, 3rd ed., McGraw Hill: New York, 2014
** M. Bushnell and V. Agrawal, Essentials of Electronic Testing for Digital, Memory and Mixed Signal VLSI Circuits, Springer: Boston, 2002
** M. Bushnell and V. Agrawal, Essentials of Electronic Testing for Digital, Memory and Mixed Signal VLSI Circuits, Springer: Boston, 2002

Revision as of 15:25, 13 February 2024

  • Modern VLSI Design
  • Second Semester AY 2023-2024
    • Synchronous classes will be held Tuesdays 6:30-8:30 PM from 20 Feb 2024 - 21 May 2024
    • Refer to the UP Diliman Academic Calendar for relevant dates and holidays.
  • Course Credit: 3 units (2 units lecture, 1 unit lab)

Catalog Description

Digital systems and VLSI. Transistors and layout. Logic functions. Combinational logic networks. Sequential machines. Systems architecture design and HDLs. Subsystem design and IP components. CAD systems and algorithms.

Prerequisite: Switching Theory and Digital Logic Design

Course Outline

Module Date Topic Resources Activity
1 Feb 13 Class Policies
2 Feb 20 Introduction to Digital Systems and VLSI Tool Orientation
3-4 Feb 27 Hardware Description Languages Lab 1: Coding Styles

Lab 2: Combinational Design

5-6 March 12 Architectural Design Lab 3: Timing Constraints

Lab 4: Sequential Design

Lenten + Reading Break
7 April 9 Transistors Project Discussion
8 April 16 Logic Functions
9 April 23 Logic Network
10 April 30 Sequential Circuits
11 May 7 Testing and Testability
12 May 14 Design for Test

References

  • review of semiconductor fundamentals [EEE 41]
  • Book References
    • S. Brown and Z. Vranesic, Fundamentals of Digital Logic with Verilog Design, 3rd ed., McGraw Hill: New York, 2014
    • M. Bushnell and V. Agrawal, Essentials of Electronic Testing for Digital, Memory and Mixed Signal VLSI Circuits, Springer: Boston, 2002
    • M. Keating, D. Flynn, R. Aitken, A. Gibbons, K. Shi, Low Power Methodology Manual (For System-on-Chip Design), Springer, 2007
    • J. Rabaey, A. Chandrakasan, B. Nikolic, Digital Integrated Circuits: A Design Perspective, Second edition, Prentice Hall, 2002.
    • N. Weste, D. Harris, CMOS VLSI Design (A Circuits and Systems Perspective), Addison-Wesley, 2005
    • W. Wolf, Modern VLSI Design: IP-Based Design, Fourth edition, Pearson Education Inc., 2009


  • Other References