Digital Systems Testing (January 2025): Difference between revisions
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|| [https://drive.google.com/file/d/1zcI2cZeu5UoxL3b6aeZuI8PraK3bW3ih/view?usp=sharing Lec03 Self Review] | || [https://drive.google.com/file/d/1zcI2cZeu5UoxL3b6aeZuI8PraK3bW3ih/view?usp=sharing Lec03 Self Review] | ||
[Lec04 Slide deck] | [https://drive.google.com/file/d/1M6rK0t-tKQxU7Uor6LYPQ4jJOYCMWHhI/view?usp=sharing Lec04 Slide deck] | ||
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Revision as of 09:46, 6 February 2025
- Digital Systems Testing
- Second Semester AY 2024-2025
- Synchronous classes will be held Thursdays 6-9 PM
- Refer to the UP Diliman Academic Calendar for relevant dates and holidays.
- Course Credit: 3 units (3 hours lecture)
Catalog Description
Test economics and motivation. Fault models and simulation. Test pattern generation. Measures for testability. Design for testability. Memory testing.
Prerequisite: Digital Logic Design and Introduction to Semiconductor Devices
Course Outline
| Module | Date | Topic | Resources | Activity |
|---|---|---|---|---|
| 0 | Jan 23 | Introduction | Zoom Meeting Summary | |
| 1 | Jan 30 | Economics of Test | Lec01 Slide deck | |
| 2 | Feb 6 | Fault models | Lec03 Self Review | |
| 2 | Feb 13 | Algorithms for fault testing | ||
| 2 | Feb 20 | Combinational Circuit test generation | ||
| 3 | Feb 27 | Review of Sequential Circuit Design | ||
| Mar 6 | ||||
| Mar 13 | ||||
| Mar 20 | ||||
| Mar 27 |
Announcements
- Jan 23: This will be our class home page. For those enrolled in EE 269, assessment submissions will be through UVLe
References
- Book References
- M. L. Bushnell and V. D. Agrawal, Essentials of Electronic Testing, Springer, 2005.
- Miron Abramovici, Melvin A. Breuer and Arthur D. Friedman, “Digital Systems Testing & Testable Design”, IEEE Press, 1994
- Niraj Jha and Sandeep Gupta, “Testing of Digital Systems”, Cambridge University Press, 2003
- Z. Navabi, “Digital System Test and Testable Design”. Springer, 2011.
- Other References
- Lukac, M., Kameyama, M., Perkowski, M., & Kerntopf, P. (2019). USING HOMING, SYNCHRONIZING AND DISTINGUISHING INPUT SEQUENCES FOR THE ANALYSIS OF REVERSIBLE FINITE STATE MACHINES. Facta Universitatis, Series: Electronics and Energetics, 32(3), 417-438
- I. Pomeranz and S. Reddy, “Application of homing sequences to synchronous sequential circuit testing,” in Test Symposium, 1993., Proceedings of the Second Asian, pp. 324–329