User contributions for Anastacia Alvarez

11:3611:36, 23 January 2025 diff hist +1,537‎ N Digital Systems Testing (January 2025) ‎ Created page with "*'''Digital Systems Testing''' *Second Semester AY 2024-2025 **Synchronous classes will be held Thursdays 6-9 PM **Refer to the [https://our.upd.edu.ph/files/calendar/regular/ACAD%20CAL%202024-2025.pdf#page=3 UP Diliman Academic Calendar] for relevant dates and holidays. *Course Credit: 3 units (3 hours lecture) ==Catalog Description== Test economics and motivation. Fault models and simulation. Test pattern generation. Measures for testability. Design for testab..." Tag: Visual edit
11:2311:23, 23 January 2025 diff hist +45‎ Classes ‎ →‎Class Offerings Tag: Visual edit

15:4815:48, 1 September 2024 diff hist 0‎ Digital IC Design (August 2024) ‎ →‎Course Outline
15:4715:47, 1 September 2024 diff hist −628‎ Digital IC Design (August 2024) ‎No edit summary
15:1115:11, 1 September 2024 diff hist +3,331‎ N Digital IC Design (August 2024) ‎ Created page with "* First Semester AY 2024-2025 ** Synchronous classes will be held Tuesdays 6-9 PM ** Refer to the [https://upd.edu.ph/academics/academic-calendar-2/ UP Diliman Academic Calendar] for relevant dates and holidays. * Course Credit: 4 units (3 units lecture, 1 unit lab) == Catalog Description == Fundamentals of MOSFETS. Technology and modelling. Scaling and limits of scaling. Design for deep-submicron CMOS – high speed. Design techniques for low power. Arithmetic circui..."
15:0415:04, 1 September 2024 diff hist +38‎ Classes ‎ →‎Class Offerings Tag: Visual edit

09:4009:40, 24 April 2024 diff hist +1‎ Lab 4: Sequential Design ‎No edit summary Tag: Visual edit
09:3809:38, 24 April 2024 diff hist +566‎ Lab 4: Sequential Design ‎No edit summary
08:3508:35, 24 April 2024 diff hist 0‎ Project Discussion ‎No edit summary
08:3408:34, 24 April 2024 diff hist +48‎ Project Discussion ‎No edit summary
08:3308:33, 24 April 2024 diff hist +236‎ Project Discussion ‎No edit summary
08:3008:30, 24 April 2024 diff hist +377‎ N Project Discussion ‎ Created page with "For your EE 227 project, each group/individual will be implementing a different design. Undergraduates are allowed to implement the project in groups of 2 or 3. Individual projects are also allowed. For graduate students, projects will be individual. Some possible projects (for undergrads): * 8- or 16- bit processor * image filtering * other encryption/decryption algorithms"
08:2708:27, 24 April 2024 diff hist +4‎ Modern VLSI Design (February 2024) ‎ →‎Course Outline
08:2608:26, 24 April 2024 diff hist +102‎ Modern VLSI Design (February 2024) ‎ →‎Course Outline

15:0715:07, 22 April 2024 diff hist +24‎ Lab 4: Sequential Design ‎No edit summary
13:0513:05, 22 April 2024 diff hist +25‎ Lab 4: Sequential Design ‎No edit summary
13:0413:04, 22 April 2024 diff hist +358‎ N Lab 4: Sequential Design ‎ Created page with "In this exercise, we will complete our design of the LiCi encryption. Below are the general steps we will be following: * Using the keygen design from Lab 2, we will re-synthesize it using the sky130nm following the procedure in Lab 3. * Design the whole system, using our keygen, LiCi round and counter. * Synthesize the design with and without constraints"
13:0013:00, 22 April 2024 diff hist +2‎ Modern VLSI Design (February 2024) ‎ →‎Course Outline
13:0013:00, 22 April 2024 diff hist +2‎ Modern VLSI Design (February 2024) ‎ →‎Course Outline

14:0814:08, 19 March 2024 diff hist +3‎ DFG Exercise ‎No edit summary current
14:0714:07, 19 March 2024 diff hist +342‎ N DFG Exercise ‎ Created page with "Given the following code snippet: d = a*c t = a+b s = d*t If t = 1 then { d = a-b s = a+b } Else d = a+d 1. Determine the single assignment form of the code 2. Draw the corresponding data flow graph 4. Determine the datapath assuming you have 1 multiplier, 1 adder and 1 subtractor 5. Derive the corresponding control"
14:0314:03, 19 March 2024 diff hist +18‎ Modern VLSI Design (February 2024) ‎ →‎Course Outline

18:2318:23, 14 March 2024 diff hist −91‎ Lab 3a: Synthesis and P&R ‎No edit summary current
18:2218:22, 14 March 2024 diff hist +635‎ Lab 3a: Synthesis and P&R ‎No edit summary
18:1618:16, 14 March 2024 diff hist +148‎ N Lab 3a: Synthesis and P&R ‎ Created page with "In this exercise, we will go through the synthesis and place and route process with the SkyWater 130nm process. Use the tutorial from SEACAS 2023."
18:1418:14, 14 March 2024 diff hist +32‎ Modern VLSI Design (February 2024) ‎ →‎Course Outline

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