Hardware Description Languages

Overview

As the size and complexity of digital systems increase, more computer aided design tools which facilitate design entry, verification and automatic hardware generation are being introduced into the design process. The newest addition to this design methodology is Hardware Description Languages (HDLs).

Hardware Description Language is a specialized language used to describe the behaviour and/or structure of digital circuits. HDLs are used to describe hardware for the purpose of simulation, modeling, testing, design and documentation. You can check this [wikipage] for a brief background on HDLs. For this course, we will be focusing on Verilog. If you are not familiar with Verilog, here's a [short video] to give an overview of what Verilog is.

There are different implementation approaches for digital design (Fig. 1). Custom IC design requires drawing the polygons manually. Designs using HDLs follow the semi-custom approach, where designs are automatically (through the process known as synthesis) to its corresponding gate or other primitive netlist.

Module and Instance

We always start our Verilog code with the definition of a module. A module defines the design unit or block, starting with the name and its input and output ports (See Fig. 2). It starts with the keyword module and ends with the keyword endmodule.

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