Digital IC Design (September 2023): Difference between revisions

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|| [[https://drive.google.com/file/d/1AEda5iR8LFU87qcRtVnkg2rD0idrtuSS/view?usp=sharing pre-recorded video]]
[[https://www.youtube.com/watch?v=JfNnSYuIOkc Security]]
[[https://www.youtube.com/watch?v=JfNnSYuIOkc Security]]
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| 6 || 13 Nov 2023 || Low power design techniques
| 6 || 13 Nov 2023 || Low power design techniques
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| 7 || 20 Nov 2023 || Timing
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[[https://drive.google.com/file/d/1_FSKjfoFh_GVyawRaalENyBKW2FqcY43/view?usp=sharing Energy video]]
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|  || 27 Nov 2023 || Declared Holiday
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| 8 || 27 Nov 2023 || Memory Design
| 8 || 4 Dec 2023 || Memory Design
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| 9 || 4 Dec 2023 || Subthreshold Memory
| 9 || 11 Dec 2023 || Subthreshold Memory
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| 10 || 11 Dec 2023 || Design for Testability
| 10 || 18 Dec 2023 || One-on-one project discussions
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| 11 || 18 Dec 2023 || Security and Other Topics
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|  || 8 Jan 2024 || Finals
|  || 8 Jan 2024 || Finals

Revision as of 21:28, 13 November 2023

  • Digital Integrated Circuits
  • First Semester AY 2023-2024
    • Synchronous classes will be held Mondays 6-9 PM from 25 Sep 2023 - 18 Dec 2023
    • Refer to the UP Diliman Academic Calendar for relevant dates and holidays.
  • Course Credit: 4 units (3 units lecture, 1 unit lab)

Catalog Description

Fundamentals of MOSFETS. Technology and modelling. Scaling and limits of scaling. Design for deep-submicron CMOS – high speed. Design techniques for low power. Arithmetic circuits. Driving interconnect, high-speed signalling. Timing. Memory design. Design for testability.

Prerequisite: CoE 141 or equiv

Course Outline

Module Date Topic Resources Activity
1 25 Sep 2023 Introduction [video] Activity 1
2 02 Oct 2023 MOS Transistor and Technology Scaling [video] Installing the Tools
3 09 Oct 2023 CMOS Inverter and Delay models [Inverter] Activity 3
12-18 Oct 2023 Reading Break
4 23 Oct 2023 CMOS Gates and Logical Effort [CMOS Gates]

[Logical Effort]

CMOS Gates Exercise
30 Oct 2023 Declared Non-working Holiday
5 6 Nov 2023 Variability [pre-recorded video]

[Security]

6 13 Nov 2023 Low power design techniques video Lab Exercise on Variability
7 20 Nov 2023 Timing [Power video]

[Energy video]

Activity 7
27 Nov 2023 Declared Holiday
8 4 Dec 2023 Memory Design video Lab Exercise on Memory
9 11 Dec 2023 Subthreshold Memory video Activity 9
10 18 Dec 2023 One-on-one project discussions
8 Jan 2024 Finals

References

  • review of semiconductor fundamentals [EEE 41]
  • review of transistors and transistor circuits [EEE 51]
  • Boom References
    • J. Rabaey. 2009. Low Power Design Essentials. Springer Publishing Company, Incorporated.
    • J. Rabaey, Chandrakasan, A,, Nikolic, B. 2004. Digital integrated circuits- A design perspective. Prentice Hall.
    • A. Chandrakasan, W. Bowhill, and F. Fox. 2000. Design of High-Performance Microprocessor Circuits. Wiley-IEEE Press
  • Other References