Digital IC Design (September 2023): Difference between revisions

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(Created page with "* '''Digital Integrated Circuits''' * First Semester AY 2023-2024 ** Synchronous classes will be held Mondays 6-9 PM from 25 Sep 2023 - 18 Dec 2023 ** Refer to the [https://our.upd.edu.ph/files/calendar/regular/ACAD%20CAL%202023-2024.pdf UP Diliman Academic Calendar] for relevant dates and holidays. * Course Credit: 4 units (3 units lecture, 1 unit lab) == Catalog Description == Fundamentals of MOSFETS. Technology and modelling. Scaling and limits of scaling. Design fo...")
 
 
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{| class="wikitable" style="width: 70%;"
{| class="wikitable" style="width: 70%;"
|-
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! !! Date !! Topic !! Resources !! Activity
! Module !! Date !! Topic !! Resources !! Activity
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|-
| style="width: 5%"| 1 ||style="width: 15%"| 25 Sep 2023 ||style="width: 50%"| Introduction  
| style="width: 5%"| 1 ||style="width: 10%"| 25 Sep 2023 ||style="width: 30%"| Introduction  
|| video
|| [[https://drive.google.com/file/d/1NbhtoP3g40WDHdIrsDwG6BdELkM1DL55/view?usp=sharing video]]
|| [[Activity 1]]
|| [[Activity 1]]
|-
|-
| 2 || 02 Oct 2023 || MOS Transistor and Technology Scaling
| 2 || 02 Oct 2023 || MOS Transistor and Technology Scaling
|| video
|| [[https://drive.google.com/file/d/1NfmDr5wB-xRnDP-Zb-JWHkCWvscNsNI2/view?usp=sharing video]]
|| [[Activity 2]]
|| [[Installing the Tools]]
|-
|-
| 3 || 09 Oct 2023 || CMOS Gates and Delay models
| 3 || 09 Oct 2023 || CMOS Inverter and Delay models
|| video
|| [[https://drive.google.com/file/d/197AJnFycvcV3W-9ipT3Mr58JRIR8uTlf/view?usp=sharing Inverter]]
|| [[Activity 3]]
|| [[Activity 3]]
|-
|-
| 4 || Reading Break
| || 12-18 Oct 2023 || Reading Break
|-
|-
| 5 || 23 Oct 2023 || Static and Dynamic Logic Styles
| 4 || 23 Oct 2023 || CMOS Gates and Logical Effort
|| video
|| [[https://drive.google.com/file/d/1Wt4LvZqdrq1CU_US9XoRVZBIAMs_QnJ8/view?usp=sharing CMOS Gates]]
|| [[Activity 4]]
[[https://drive.google.com/file/d/1WxqTbO4-tBACEPJNUPVA_fz1UL5KrkEu/view?usp=sharing Logical Effort]]
|| [[CMOS Gates Exercise]]
|-
|-
| 6 || 30 Oct 2023 || Variability
| || 30 Oct 2023 || Declared Non-working Holiday
|| video
|-
| 5 || 6 Nov 2023 || Variability
|| [[https://drive.google.com/file/d/1AEda5iR8LFU87qcRtVnkg2rD0idrtuSS/view?usp=sharing pre-recorded video]]
[[https://www.youtube.com/watch?v=JfNnSYuIOkc Security]]
||
|-
| 6 || 13 Nov 2023 || Low power design techniques
|| [[https://drive.google.com/file/d/1_Q7BYbCAP3o_j4wjul-ODRj5SN2FDwdQ/view?usp=sharing Power video]]
[[https://drive.google.com/file/d/1_FSKjfoFh_GVyawRaalENyBKW2FqcY43/view?usp=sharing Energy video]]
|| [[Lab Exercise on Variability]]
|| [[Lab Exercise on Variability]]
|-
|-
| 7 || 6 Nov 2023 || Low power design techniques
| 7 || 20 Nov 2023 || Timing
|| video
|| [[https://drive.google.com/file/d/1BV0ttfCVDo5EpB0V9iViTK9UlsCgwOwt/view?usp=sharing video]]
|| [[Activity 7]]
|| [[Activity 7]]
|-
|-
| 8 || 13 Nov 2023 || Timing
|  || 27 Nov 2023 || Declared Holiday
|| video
||
|| [[Activity 8]]
||
|-
| 8 || 4 Dec 2023 || Memory Design
|| [[https://drive.google.com/file/d/1aoxYZsKu5IOTHL_aaU10Nv5KgLD7TVU5/view?usp=sharing video]]
|| [[Lab Exercise on Memory]]
|-
| 9 || 11 Dec 2023 || Subthreshold Memory
||
||
|-
| 10 || 18 Dec 2023 || One-on-one project discussions
||
||
|-
|-
|  || 8 Jan 2024 || Finals
|-
|}
|}
== References ==
* review of semiconductor fundamentals [[https://www.up-microlab.org/resources/classes/eee-41-home-page/eee-41-s1y2017/ EEE 41]]
* review of transistors and transistor circuits [[https://www.up-microlab.org/resources/classes/eee-51-home-page/eee-51-s2y2019/ EEE 51]]
* Boom References
** J. Rabaey. 2009. Low Power Design Essentials. Springer Publishing Company, Incorporated.
** J. Rabaey, Chandrakasan, A,, Nikolic, B. 2004. Digital integrated circuits- A design perspective. Prentice Hall.
** A. Chandrakasan, W. Bowhill, and F. Fox. 2000. Design of High-Performance Microprocessor Circuits. Wiley-IEEE Press
* Other References

Latest revision as of 08:20, 3 January 2024

  • Digital Integrated Circuits
  • First Semester AY 2023-2024
    • Synchronous classes will be held Mondays 6-9 PM from 25 Sep 2023 - 18 Dec 2023
    • Refer to the UP Diliman Academic Calendar for relevant dates and holidays.
  • Course Credit: 4 units (3 units lecture, 1 unit lab)

Catalog Description

Fundamentals of MOSFETS. Technology and modelling. Scaling and limits of scaling. Design for deep-submicron CMOS – high speed. Design techniques for low power. Arithmetic circuits. Driving interconnect, high-speed signalling. Timing. Memory design. Design for testability.

Prerequisite: CoE 141 or equiv

Course Outline

Module Date Topic Resources Activity
1 25 Sep 2023 Introduction [video] Activity 1
2 02 Oct 2023 MOS Transistor and Technology Scaling [video] Installing the Tools
3 09 Oct 2023 CMOS Inverter and Delay models [Inverter] Activity 3
12-18 Oct 2023 Reading Break
4 23 Oct 2023 CMOS Gates and Logical Effort [CMOS Gates]

[Logical Effort]

CMOS Gates Exercise
30 Oct 2023 Declared Non-working Holiday
5 6 Nov 2023 Variability [pre-recorded video]

[Security]

6 13 Nov 2023 Low power design techniques [Power video]

[Energy video]

Lab Exercise on Variability
7 20 Nov 2023 Timing [video] Activity 7
27 Nov 2023 Declared Holiday
8 4 Dec 2023 Memory Design [video] Lab Exercise on Memory
9 11 Dec 2023 Subthreshold Memory
10 18 Dec 2023 One-on-one project discussions
8 Jan 2024 Finals

References

  • review of semiconductor fundamentals [EEE 41]
  • review of transistors and transistor circuits [EEE 51]
  • Boom References
    • J. Rabaey. 2009. Low Power Design Essentials. Springer Publishing Company, Incorporated.
    • J. Rabaey, Chandrakasan, A,, Nikolic, B. 2004. Digital integrated circuits- A design perspective. Prentice Hall.
    • A. Chandrakasan, W. Bowhill, and F. Fox. 2000. Design of High-Performance Microprocessor Circuits. Wiley-IEEE Press
  • Other References