Digital IC Design (August 2024): Difference between revisions

From Center for Integrated Circuits and Devices Research (CIDR)
Jump to navigation Jump to search
(Created page with "* First Semester AY 2024-2025 ** Synchronous classes will be held Tuesdays 6-9 PM ** Refer to the [https://upd.edu.ph/academics/academic-calendar-2/ UP Diliman Academic Calendar] for relevant dates and holidays. * Course Credit: 4 units (3 units lecture, 1 unit lab) == Catalog Description == Fundamentals of MOSFETS. Technology and modelling. Scaling and limits of scaling. Design for deep-submicron CMOS – high speed. Design techniques for low power. Arithmetic circui...")
 
 
(6 intermediate revisions by the same user not shown)
Line 14: Line 14:
! Module !! Date !! Topic !! Resources !! Activity
! Module !! Date !! Topic !! Resources !! Activity
|-
|-
| style="width: 5%"| 1 ||style="width: 10%"| 25 Sep 2023 ||style="width: 30%"| Introduction  
| style="width: 5%"| 1 ||style="width: 20%"| 10 Sep 2024 ||style="width: 30%"| Introduction  
|| [[https://drive.google.com/file/d/1NbhtoP3g40WDHdIrsDwG6BdELkM1DL55/view?usp=sharing video]]
|| [[video]]
|| [[Activity 1]]
|| [[Activity 1]]
|-
|-
| 2 || 02 Oct 2023 || MOS Transistor and Technology Scaling
| 2 || 17 Sep 2024 || MOS Transistor and Technology Scaling
|| [[https://drive.google.com/file/d/1NfmDr5wB-xRnDP-Zb-JWHkCWvscNsNI2/view?usp=sharing video]]
|| [[video]]
|| [[Installing the Tools]]
|| [[Installing the Tools]]
|-
|-
| 3 || 09 Oct 2023 || CMOS Inverter and Delay models
| 3 || 24 Sep 2024 || CMOS Inverter and Delay models
|| [[https://drive.google.com/file/d/197AJnFycvcV3W-9ipT3Mr58JRIR8uTlf/view?usp=sharing Inverter]]
|| [[ Inverter]]
|| [[Activity 3]]
|| [[Activity 3]]
|-
|-
| || 12-18 Oct 2023 || Reading Break
| 4 || 1-8 Oct 2024 || CMOS Gates and Logical Effort
|-
|| [[ CMOS Gates]]
| 4 || 23 Oct 2023 || CMOS Gates and Logical Effort
[[Logical Effort]]
|| [[https://drive.google.com/file/d/1Wt4LvZqdrq1CU_US9XoRVZBIAMs_QnJ8/view?usp=sharing CMOS Gates]]
[[https://drive.google.com/file/d/1WxqTbO4-tBACEPJNUPVA_fz1UL5KrkEu/view?usp=sharing Logical Effort]]
|| [[CMOS Gates Exercise]]
|| [[CMOS Gates Exercise]]
|-
|-  
|  || 30 Oct 2023 || Declared Non-working Holiday
||  Midterm Exam
|-
|22 Oct 2024
| 5 || 6 Nov 2023 || Variability
|-  
|| [[https://drive.google.com/file/d/1AEda5iR8LFU87qcRtVnkg2rD0idrtuSS/view?usp=sharing pre-recorded video]]
| 5 || 15 Oct 2024|| Arithmetic Circuits
[[https://www.youtube.com/watch?v=JfNnSYuIOkc Security]]
|| [[video]]
||
|-
| 6 ||  29 Oct 2024|| Low power design techniques
|| [[video]]
||  
||  
|-
|-
| 6 || 13 Nov 2023 || Low power design techniques
| 7 || || Variability
|| [[https://drive.google.com/file/d/1_Q7BYbCAP3o_j4wjul-ODRj5SN2FDwdQ/view?usp=sharing Power video]]
|| [[video]]
[[https://drive.google.com/file/d/1_FSKjfoFh_GVyawRaalENyBKW2FqcY43/view?usp=sharing Energy video]]
|| [[Lab Exercise on Variability]]
|| [[Lab Exercise on Variability]]
|-
|-
| 7 || 20 Nov 2023 || Timing
| 8 || || Timing
|| [[https://drive.google.com/file/d/1BV0ttfCVDo5EpB0V9iViTK9UlsCgwOwt/view?usp=sharing video]]
|| [[video]]
|| [[Activity 7]]
|-
|  || 27 Nov 2023 || Declared Holiday
||
||  
||  
|-
|-
| 8 || 4 Dec 2023 || Memory Design
| 9 || || Memory Design
|| [[https://drive.google.com/file/d/1aoxYZsKu5IOTHL_aaU10Nv5KgLD7TVU5/view?usp=sharing video]]
|| [[video]]
|| [[Lab Exercise on Memory]]
|| [[Lab Exercise on Memory]]
|-
|-
| 9 || 11 Dec 2023 || Subthreshold Memory
| 10 || || Testing and Testability
||  
||  
||  
||  
|-
|-
| 10 || 18 Dec 2023 || One-on-one project discussions
| 11 || || Special Topics
||  
||  
||  
||  
|-
|-
|  || 8 Jan 2024 || Finals
|| Finals
|-  
|-  
|}
|}
Line 74: Line 71:
* review of transistors and transistor circuits [[https://www.up-microlab.org/resources/classes/eee-51-home-page/eee-51-s2y2019/ EEE 51]]
* review of transistors and transistor circuits [[https://www.up-microlab.org/resources/classes/eee-51-home-page/eee-51-s2y2019/ EEE 51]]


* Boom References
* Book References
** J. Rabaey. 2009. Low Power Design Essentials. Springer Publishing Company, Incorporated.
** J. Rabaey. 2009. Low Power Design Essentials. Springer Publishing Company, Incorporated.
** J. Rabaey, Chandrakasan, A,, Nikolic, B. 2004. Digital integrated circuits- A design perspective. Prentice Hall.  
** J. Rabaey, Chandrakasan, A,, Nikolic, B. 2004. Digital integrated circuits- A design perspective. Prentice Hall.  
** A. Chandrakasan, W. Bowhill, and F. Fox. 2000. Design of High-Performance Microprocessor Circuits. Wiley-IEEE Press
** A. Chandrakasan, W. Bowhill, and F. Fox. 2000. Design of High-Performance Microprocessor Circuits. Wiley-IEEE Press
** M. Alioto (ed), Enabling the Internet of Things: From Integrated Circuits to Integrated Systems, Springer 2017.
** Neil Weste and David Harris. 2010. CMOS VLSI Design: A Circuits and Systems Perspective (4th. ed.). Addison-Wesley Publishing Company, USA.


* Other References
* Other References

Latest revision as of 07:43, 9 October 2024

  • First Semester AY 2024-2025
  • Course Credit: 4 units (3 units lecture, 1 unit lab)

Catalog Description

Fundamentals of MOSFETS. Technology and modelling. Scaling and limits of scaling. Design for deep-submicron CMOS – high speed. Design techniques for low power. Arithmetic circuits. Driving interconnect, high-speed signalling. Timing. Memory design. Design for testability.

Prerequisite: CoE 141 or equiv

Course Outline

Module Date Topic Resources Activity
1 10 Sep 2024 Introduction video Activity 1
2 17 Sep 2024 MOS Transistor and Technology Scaling video Installing the Tools
3 24 Sep 2024 CMOS Inverter and Delay models Inverter Activity 3
4 1-8 Oct 2024 CMOS Gates and Logical Effort CMOS Gates

Logical Effort

CMOS Gates Exercise
Midterm Exam 22 Oct 2024
5 15 Oct 2024 Arithmetic Circuits video
6 29 Oct 2024 Low power design techniques video
7 Variability video Lab Exercise on Variability
8 Timing video
9 Memory Design video Lab Exercise on Memory
10 Testing and Testability
11 Special Topics
Finals

References

  • review of semiconductor fundamentals [EEE 41]
  • review of transistors and transistor circuits [EEE 51]
  • Book References
    • J. Rabaey. 2009. Low Power Design Essentials. Springer Publishing Company, Incorporated.
    • J. Rabaey, Chandrakasan, A,, Nikolic, B. 2004. Digital integrated circuits- A design perspective. Prentice Hall.
    • A. Chandrakasan, W. Bowhill, and F. Fox. 2000. Design of High-Performance Microprocessor Circuits. Wiley-IEEE Press
    • M. Alioto (ed), Enabling the Internet of Things: From Integrated Circuits to Integrated Systems, Springer 2017.
    • Neil Weste and David Harris. 2010. CMOS VLSI Design: A Circuits and Systems Perspective (4th. ed.). Addison-Wesley Publishing Company, USA.
  • Other References
Retrieved from "https://cidr.up-microlab.org/index.php?title=Digital_IC_Design_(August_2024)&oldid=785"