Digital IC Design (September 2023): Difference between revisions

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Revision as of 18:00, 6 November 2023

  • Digital Integrated Circuits
  • First Semester AY 2023-2024
    • Synchronous classes will be held Mondays 6-9 PM from 25 Sep 2023 - 18 Dec 2023
    • Refer to the UP Diliman Academic Calendar for relevant dates and holidays.
  • Course Credit: 4 units (3 units lecture, 1 unit lab)

Catalog Description

Fundamentals of MOSFETS. Technology and modelling. Scaling and limits of scaling. Design for deep-submicron CMOS – high speed. Design techniques for low power. Arithmetic circuits. Driving interconnect, high-speed signalling. Timing. Memory design. Design for testability.

Prerequisite: CoE 141 or equiv

Course Outline

Module Date Topic Resources Activity
1 25 Sep 2023 Introduction [video] Activity 1
2 02 Oct 2023 MOS Transistor and Technology Scaling [video] Installing the Tools
3 09 Oct 2023 CMOS Inverter and Delay models [Inverter] Activity 3
12-18 Oct 2023 Reading Break
4 23 Oct 2023 CMOS Gates and Logical Effort [CMOS Gates]

[Logical Effort]

CMOS Gates Exercise
30 Oct 2023 Declared Non-working Holiday
5 6 Nov 2023 Variability [pre-recorded video] Lab Exercise on Variability
6 13 Nov 2023 Low power design techniques video Activity 5
7 20 Nov 2023 Timing video Activity 8
8 27 Nov 2023 Memory Design video Lab Exercise on Memory
9 4 Dec 2023 Subthreshold Memory video Activity 9
10 11 Dec 2023 Design for Testability video Activity 11
11 18 Dec 2023 Security and Other Topics video Activity 12
8 Jan 2024 Finals